Wahanga Tapeke: 1842
Patohia: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Whakauru: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Putanga: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Tuhinga o mua: 1, Ratio - Whakauru: Putanga: 2:20,